Vittorio Zaccaria Rev. 2026.06

Bio

Academic biography

He received the Laurea degree in Computer Engineering in 1998 and the Ph. D. degree in Computer Engineering in 2002 at the Politecnico di Milano, Italy. He is currently associate Professor at the Dipartimento di Elettronica e Informazione, Politecnico di Milano where he currently investigates novel techniques for computer aided design of digital circuits with emphasis on cryptography. From 2003 until 2007, he held various positions in the Advanced System Technology group at STMicroelectronics where he was involved in the architectural specification and design of multi-threaded processors with particular emphasis on emerging stream-programming paradigms. He has also been involved in the development of tools and methodologies for designing low-power industrial networks on chip (NoC). He has published a book, over 80 papers in either international journals or conference proceedings and he holds two US patents. He has also been appointed as Principal Investigator for industrial collaboration grants from STMicroelectronics related to the design cryptographic hardware using functional programming languages.

Appointments

Academic and industrial path

2020 -present

Associate Professor

Politecnico di Milano, Milan, Italy

  • Appointed as professor of Advanced Operating Systems (Laurea Magistrale in Ingegneria Informatica)
  • Appointed as professor of Principi di Architetture dei Calcolatori (Laurea Triennale in Ingegneria Elettronica)
  • Rector's referent c/o the International RISC-V association
2009 -2020

Assistant Professor

Politecnico di Milano, Milan, Italy

  • Appointed as Principal Investigator for an industrial collaboration grant from STMicroelectronics related to the design cryptographic hardware using functional programming languages.
  • Specified and developed the ReSPIR optimization algorithm for processor/SoC optimization. It enables efficient IP reuse in the context of virtual platforms (10x reduction in time, less than 1 percent error w.r.t. ideal).
  • Succesfully brought a team of 5 people to prototype a new type of video-surveillance system in the context of the 2PARMA FP7 European Project.
2007 -2009

Research Associate

Politecnico di Milano, Milan, Italy

  • Introduced advanced techniques for managing design of experiments and response surface methods in automatic design space exploration for multi-processors.
  • Extended classical design space exploration to tackle the problem of process-variability-aware design of multi-processors.
2004 -2007

R&D Engineer

STMicroelectronics, Lugano, Switzerland

  • Specified, prototyped and validated several ST200 processor architectural extensions. Vertical validation of the extensions from the ISA up to the application-layer/OS.
  • Enabled secure co-hosting of more operating systems by means of secure storage extensions of the ST200 architecture.
  • Collaborated to the specification, validation (by means of functional and timing simulation) and architectural exploration for symmetric multi-processing based on ST200.
2003 -2004

Research Consultant

STMicroelectronics, Milan, Italy

  • Pioneered the field of Power Modeling of VLIW Cores (10 percent error RTL vs Gate-level).
  • Introduced an effective methodology to minimize the effort of design of experiments for NoC power models (10x reduction in characterization time, 33 percent error).

Education

Degrees

1992-1998

Master in Computer engineering

Politecnico di Milano, Italy

Java agents for a distributed file system.

1998-2002

Ph.D in Computer engineering

Politecnico di Milano, Italy

"Power consumption estimation and optimization of VLIW processors. Sponsored by STMicroelectronics."